Hi TI,
Q1) Parameter #14 "Setup Time, EM_WAIT asserted before end of Strobe Phase" in table 6-23 (and figure 6-16) of the OMAP-L138datasheet has the minimum value of (4E+3) for all operating points, where E is the EMA_CLK period. There is a violation of this time that I have observed at least at two of our custom boards.
These boards have OMAPL138BZWTD4 (rev 2.0) running at 24x18=432MHz with EMA_CLK of 432/3=144MHz (Tc=6.944ns). CVDD=RVDD=1.30V, DVDD18=DDR_DVDD18=1.80V, DVDD3318_(A,B,C)=3.30V. Tamb=23°C, Tc=43°C, estimated Tj<55°C.
EMIFA_CE3CFG settings: R_SETUP=R_HOLD=1(2E), R_STROBE=7(8E), SS=0(normal), EW=1(enabled), WP1=1(active high), CS3_WAIT=1(WAIT[1]), MAX_EXT_WAIT=3(64E=444.4ns).
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Nominal EMA_OE is 8E=55.56ns. That (4E+3) value for Tc=144MHz should be 30.78ns. Observed value is 34.5ns or ~5E, that is 3.7ns more, but there are no extended strobe cycles inserted as shown above. These cycles are inserted as normal when I increase that setup time for ~1ns. This violation time seems increasing when temperature is rising. Scope probes are 5mm away from OMAP balls, estimated delay is 2x35ps.
By the way, this parameter #14 in table 6-23 seems named incorrectly: "tsu(EMOEL-EMWAIT)" instead of "tsu(EMWAIT-EMOEH)".
Q2) Parameter #11 "Delay time from EMA_WAIT deasserted to EMA_OEn high" in table 6-24 (and figure 6-16) has the range of (3E-3ns)...(4E+3ns) for all operating points, or (17.8...30.8)ns at 144MHz. The delay I'm observing is (28.8...42.0)ns as shown below, that is (4.1E...6.1E) or (4E+1ns)...(6E+0.3ns). Maximum EMA_WAIT[1] asserted time is 408ns, that is lower than maximum wait time (444.4ns) set in EMIFA_CE3CFG.
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I have reported this issue earlier (2 years ago), but there's no response yet. There was (4.6E to 5.6E) or (4E+6ns to 5E+6ns) delay (46ns to 56ns with EMIFA @ 100MHz) both for read and write transactions.
BR,
Denis
Q2 UPDATE: in rare cases MAX_EXT_WAIT time (444ns) was slightly exceeded.
Picture below has been obtained after extending MAX_EXT_WAIT to 555.5ns. Now that delay is (35.2...41.9)ns that is (5E+3ns)...(6E+3.3ns).
