Hello,
I am working on a custom board with a C6748 processor. It has mDDR memory of 512MB. The external input clock frequency is 15Mhz. The GEL file is modified accordingly, to match these settings. I could verify the PLL1 frequency of 150Mhz on the board using oscilloscope. But the debug session hangs after loading. I used the mDDR_DDR2_Memory_Controller_Register_Calc_Rev4.xls excel sheet to calculate the values of mDDR register. I found the following:
SDCR: 0x02034622
SDRCR: 0x00000492
SDTIMR1: 0x14923208
SDTIMR2: 0x380211C0
DRPHYC1R: 0x000000C4
The PLL setup is:
Set_Core_300MHz() ---- device_PLL0(1,19,1,0,1,11,5);
Set_DDRPLL_150MHz() ---- device_PLL1(19,0,0,1,2);
Console:
C674X_0: Output: Target Connected to SR1.5
C674X_0: Output: ---------------------------------------------
C674X_0: Output: Memory Map Cleared.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: Memory Map Setup Complete.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: PSC Enable Complete.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output: mDDR initialization is in progress....
C674X_0: Output: PLL1 init done for DDR:150MHz
C674X_0: Output: Using mDDR settings
C674X_0: Output: mDDR init for 150 MHz is done
C674X_0: Output: ---------------------------------------------
Are my calculations of the mDDR registers correct? How can I verify whether the register values are actually been set?
Thanks,
Sri