Hello,
let me raise a few question about OMAP-L138 - DDR2 ODT and Drive Strength.
1. OMAP/L138 datasheet reads as follows:
Furthermore, the on-die terminating resistors of the DDR2/mDDR SDRAM device must be disabled by tying the ODT input pin of the DDR2/mDDR SDRAM to ground.
May I ask you to explain the rationale behind? Why do you not recommend impedance match at the far end?
2. Does OMAP-L138 DDR2 controller support full as well as reduced drive strength? The IBIS model does not seem to provide a model for reduced drive strength, that's why I am asking.
3. I am seeing excessive oveshoot during DDR read. Is there any restriction on DDR2 memory drive strength applied byte TI company?
Many thanks,
Milan Zelenka