Part Number: TMS320C6678
Hi,
1. Considering I have 2 C6678 boards and I want to create a hyperlink communication in both sides.
As data transfer method I have 3 methods QMSS, EDMA, CPU direct access. In any of the cases I want to know what methods of synchronization I have for the data traffic between these boards. If I write some data to remote how will be the remote notified that data is available in all 3 methods ( QMSS, EDMA, CPU direct access).
How will know the sender that remote node read the data? I should be notified somehow to prevent sender to write a new data in that segment and to overwrite information before remote part to read it, right?
I read the comments from https://e2e.ti.com/support/processors/f/791/p/193417/839313?tisearch=e2e-sitesearch&keymatch=hyperlink%2520interrupt#839313
2. If I want to use the simplest data transfer method (fro mcomplexity and configuration point of view), CPU direct access, I tried to follow the PDK example and I am a little bit confused: What is the difference between hyplnk_EXAMPLE_TEST_CPU_TOKEN_EXCHANGE and hyplnk_EXAMPLE_TEST_CPU_BLOCK_XFER
3. How can I generate from any core of evmA an interrupt to any core of evmB? If I want to signal evmB (core 1 as example) with an interrupt from evmA (core0 as example) as new data is available how should I do this? Can I use something from this hypelink interrupt part to generate back to evmA that data was read and I am ready for new data? Also how can I distinguish if the interrupt is for new data available or if it is a acknowledge interrupt?
4. From your PDK example: I suppose dataBufferViaHlink is some address from 0x40000000 - 0x4FFFFFFF range where sender should write data for the remote side. Why do you have this offset calculation: segmentID<<(RXAddrSel.rxSegSel+16)
*dataBufferViaHlink = (void *)( (char *)hlinkBase + globalAddrOffset + (segmentID<<(RXAddrSel.rxSegSel+16)));
/Daniel.