A question about interrupt latencies. We're using an OMAP-L138 running at 456MHz. The DSP has two critical interrupts to service: the UPP DMA which receives periodic data from an FPGA for processing; and the SPI which handles high-priority commands. The UPP DMA runs at 120kHz (8.3us intervals) for each packet of data. SPI uses the 4-line-with-enable mode, and the SPI driver is currently interrupting every byte. We're using the "bitmask" mode on the HWIs so that the SPI HWI can preempt the UPP DMA HWI. The whole thing is using SYS/BIOS 6.35.4.50, building in release mode with full optimisation for speed, and with all the code and data for the UPP and SPI handling in L2 RAM. That's the context...
We've got a couple of GPIO lines which go high at the start of each HWI and go low at the end, and we've got access to the UPP and SPI pins, so I can directly measure latencies on a scope. What I'm seeing is that there is around 560ns between the end of the UPP packet and the start of the UPP HWI; and around 460ns between the end of a SPI byte and the start of the SPI HWI. This is unacceptably slow.
I dug around and found the SYS/BIOS benchmarks for the C6748. These quote 91 cycles for interrupt latency, 114 cycles for the HWI prolog, 224 cycles for the HWI dispatcher, and 118 cycles for the HWI epilog. Unfortunately, this explains why we'd see times like that.
Is there any way within SYS/BIOS to reduce these latencies to something more acceptable for hard-real-time performance? Or is SYS/BIOS inherently unable to do better than this?
Looking in the HWI docs, I've found a reference to "HWI_plug()" which allows HWIs without the SYS/BIOS overhead. The docs note that HWI_enable/disableIER must be called manually to mask this and/or other interrupts, which is easy enough. The docs don't explain anything else about how to use this though. Do I need to use the "interrupt" keyword for the compiler to set up the context switch? And is there anything else which would be needed? (I don't have any other calls to SYS/BIOS within these HWIs, so that's OK.)
Also, should I still expect 91 cycles of interrupt latency even with using "HWI_plug()"?