Hello.
I need to transfer a data blocks between NAND (uses memory mapped fixed address) and DDR memory buffer. I`m using OMAP L138, DSP core. So I configure EDMA manual transfer between DDR buffer and a fixed address. It works well on the EDMA3_0, but unexpectedly transfer not starts on EDMA3_1. Initialization is the same in both cases.
It looks like transfer request was not passed to the TC for some reason (TC2 registers did not changed). In debugger I could see corresponding SER bit set after I set manual event. Documentation says it could happen if PaRAM is NULL-transfer when the event comes, but it is not my case. What else could prevent TC2 from handling this transfer? Is it enough to enable TC2 in PSC or some additional configuration required?
Thanks for your help.