Re: the OMAP-L138 SoC: There are 2x SPI ports and up to 8x SPI Chip Selects (SPIx_SCS[0:7]) available for use. Is it possible to utilize two or more CS’s within a single SPI port to have the capability of communicating individually with more than one SPI peripheral chip on the SPI bus? The UG and DS info seems to not address this capability. If it can be done, what are the limitations of doing so? Please see above attached image for proposed schematic.