Hi,
I would like to send data from DSP to ARM (TI814x) in a shared memory using EDMA (for some reason, we cannot use IPC). I searched this topic in the forum and found in this post http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/48908/216386.aspx a similar problem was already discussed. But I still did not fully understand. Hope that I can get some help here.
My questions are as follows:
1) DSP sets up an EDMA operation. When the operation is done, will EDMA trigger an interrupt on DSP or on ARM or on both side?
2) Both DSP and EDMA have the interrupt service routine corresponding to the transfer completion. But if ARM-service routine takes longer time or reacts too late, how to synchronize the data transfer?
3) In the linked post it was answered “This can be done. The EDMA controller has 2 completion interrupt, one mapped to ARM and one mapped to DSP (Recommend looking at Section 2.9.1.1 in the EDMA user guide). Region 0 interrupt goes to ARM and Region 1 interrupt goes to DSP. So you could setup your TCC values (completion code) and DRAE registers such that on completion of the ARM based EDMA transfer, the EDMA3 interrupt triggered is Region 1 interrupt going to DSP.” I didn’t understand it. Does that mean for the data transfer between two cores EDMA controller will generate 2 completion interrupts (one for ARM and one for DSP)? But as far as I understood for the shadow region, each EDMA channel can be mapped only to one region. So, how can I realize this?
Thanks,
Cassie