Part Number:AM5718
Tool/software: TI-RTOS
Hi
I'm have written code on my AM5718 C66 DSP (Code Generator Tools V8.2) that configures the DMA to read SPI data and write it to internal OCMC memory.
So far this works.
When I change the destination address to be within L2SRAM (beginning at 0x0080'0000) I dont get data (memory location remains zero).
L2 cache size is 128kB, so 160kB is available for L2SRAM.
I'm using EDMA3 low level driver V2.12.5 (from pdk_am57xx_1_0_12).
Here is a code snipet:
// 1. Works
#pragma DATA_SECTION(AIO_ADCReceiveReg, "mem_section_within_ocmc_ram");
// 2. Does not work
//#pragma DATA_SECTION(AIO_ADCReceiveReg, "mem_section_within_l2sram");
uint32_t AIO_ADCReceiveReg[4] __attribute__ ((aligned (256)));
ExtADCRxParamSet.ACnt = 4;
ExtADCRxParamSet.BCnt = 4;
ExtADCRxParamSet.CCnt = 1;
ExtADCRxParamSet.BCntRld = 0;
ExtADCRxParamSet.Dst = (uint32_t)&AIO_ADCReceiveReg[0].All;
ExtADCRxParamSet.DBIdx = sizeof(AIO_ADCReceiveReg[0]);
ExtADCRxParamSet.DCIdx = 0;
ExtADCRxParamSet.Src = SOC_MCSPI1_BASE + MCSPI_CHRX(AIO_ADC_SPI_CHANNEL);
ExtADCRxParamSet.SBIdx = 0;
ExtADCRxParamSet.SCIdx = 0;
ExtADCRxParamSet.Link = 0xFFFF;
Edma3Result = SYS_InitEdma3Channel(ExternalADCRxDataEvent, &ExtADCRxParamSet, EDMA3_DRV_SYNC_AB);
Snipet from map file:
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
L2SRAM 00800000 00028000 00002af0 00025510 RW X
OCMC_RAM1 40340000 00020000 00002010 0001dff0 RW X
SR_0 40360000 00018000 00018000 00000000 RW X
OCMC_DATA 4037c000 00003000 000024b8 00000b48 RW X
DDR b0000000 0f000000 000c412a 0ef3bed6 RW X
DDR_NO_CACHE bf000000 01000000 00004010 00ffbff0 RW X
Case 1 (working):
40342000 AIO_ADCReceiveReg
Case 2 (not working);
00802c00 AIO_ADCReceiveReg
Any ideas why DMA does not work with L2SRAM destination?
Regards,
Markus