Hello,
Just passing some days trying to boot OMAP-L138B from UART2 and NOR AIS, some problems arised:
- NOR flash: ARM stalls during boot load (rev D800F008 ROM, AIS file generated with and without CRC check)
- NOR flash: boot ok with older revision board and older CPU (rev D800F006 ROM)
- UART2: everybody boots ok from TI UART Boot host
(Note: using proprietary .out to AIS file conversion)
So I have 2 questions:
Question 1:
While completing the .const section of the .out file by zeros (the only section whose byte length was not multiple of 4), the boot process magically successes with rev D800K008. Some bug in NOR AIS loading of odd sections in the last ROM revision ?
Question 2:
When writing a MS Windows software to upload boot through UART at full speed (115200 bauds, ie 350 us per 32-bit word) , the OMAP seems to be unable to handle the data flow : self restarting (by sending BOOTME, BOOTME,...) during section transfer. Get ok only if an awful delay is inserted between each 32-bit word sent (1 ms choosen, minimal value available in Windows compiler). Not ok again if the delay is inserted every two words (8 bytes). Since there is no data flow control during boot, has the boot ROM software some limitations in UART data throughput ? Note data is uploaded only in DDR2 RAM and OMAP internal RAM, the ARM core works at 360 MHz.